diff --git a/src/steam/engine/proc-node.cpp b/src/steam/engine/proc-node.cpp index 5d34a4020..300bb9d7a 100644 --- a/src/steam/engine/proc-node.cpp +++ b/src/steam/engine/proc-node.cpp @@ -45,6 +45,7 @@ namespace engine { using util::isnil; using util::unConst; using util::contains; + using util::isSameObject; using boost::hash_combine; namespace {// Details: parsing, registration and symbol table for node spec data... @@ -495,5 +496,22 @@ namespace engine { return watch (leadPorts[leadIdx]); } + bool + PortDiagnostic::verify_connected (uint input, Port& tarPort) + { + auto& leadPorts = srcPorts(); + return input < leadPorts.size() + and isSameObject (leadPorts[input].get(), tarPort); + } + + bool + PortDiagnostic::verify_connected (Port& tarPort) + { + for (Port& port : srcPorts()) + if (isSameObject (port, tarPort)) + return true; + return false; + } + }} // namespace steam::engine diff --git a/src/steam/engine/proc-node.hpp b/src/steam/engine/proc-node.hpp index 11fcd0e5a..3e848d406 100644 --- a/src/steam/engine/proc-node.hpp +++ b/src/steam/engine/proc-node.hpp @@ -321,6 +321,9 @@ namespace engine { HashVal getProcHash(); ///< calculate an unique, stable and reproducible hash-key to identify the associated operation PortDiagnostic watchLead(uint leadIdx); + + bool verify_connected (uint input, Port&); + bool verify_connected (Port&); }; inline PortDiagnostic diff --git a/tests/core/steam/engine/node-meta-test.cpp b/tests/core/steam/engine/node-meta-test.cpp index 287476b18..65ade3cb5 100644 --- a/tests/core/steam/engine/node-meta-test.cpp +++ b/tests/core/steam/engine/node-meta-test.cpp @@ -48,7 +48,7 @@ namespace test { run (Arg) { verify_ID_specification(); - verify_ID_properties(); + verify_ID_connectivity(); } @@ -62,22 +62,22 @@ namespace test { auto& p2 = ProcID::describe("U:N2","+(a1,a2)"); auto& p3 = ProcID::describe("O:N3","(in/3)(o1,o2/2)"); - CHECK (p1.genNodeName() == "N1"_expect ); - CHECK (p1.genNodeSymbol() == "N1"_expect ); - CHECK (p1.genNodeDomain() == ""_expect ); + CHECK (p1.genNodeName() == "N1"_expect ); + CHECK (p1.genNodeSymbol() == "N1"_expect ); + CHECK (p1.genNodeDomain() == ""_expect ); CHECK (p2.genNodeName() == "U:N2"_expect ); - CHECK (p2.genNodeSymbol() == "N2"_expect ); - CHECK (p2.genNodeDomain() == "U"_expect ); + CHECK (p2.genNodeSymbol() == "N2"_expect ); + CHECK (p2.genNodeDomain() == "U"_expect ); CHECK (p3.genNodeName() == "O:N3"_expect ); - CHECK (p3.genNodeSymbol() == "N3"_expect ); - CHECK (p3.genNodeDomain() == "O"_expect ); + CHECK (p3.genNodeSymbol() == "N3"_expect ); + CHECK (p3.genNodeDomain() == "O"_expect ); - CHECK (p1.genProcName() == "N1"_expect ); - CHECK (p1.genQualifier() == ""_expect ); + CHECK (p1.genProcName() == "N1"_expect ); + CHECK (p1.genQualifier() == ""_expect ); CHECK (p2.genProcName() == "N2.+"_expect ); // domain omitted, qualifier joined with '.' - CHECK (p2.genQualifier() == ".+"_expect ); // qualifier includes leading '.' - CHECK (p3.genProcName() == "N3"_expect ); - CHECK (p2.genProcSpec() == "U:N2.+(a1,a2)"_expect ); + CHECK (p2.genQualifier() == ".+"_expect ); // qualifier includes leading '.' + CHECK (p3.genProcName() == "N3"_expect ); + CHECK (p2.genProcSpec() == "U:N2.+(a1,a2)"_expect ); CHECK (p3.genProcSpec() == "O:N3(in/3)(o1,o2/2)"_expect ); ProcID::ArgModel arg1 = p1.genArgModel(); @@ -113,7 +113,7 @@ namespace test { * @todo WIP 2/25 πŸ” define ⟢ πŸ” implement */ void - verify_ID_properties() + verify_ID_connectivity() { // This operation emulates a data source auto src_opA = [](int param, int* res) { *res = param; }; @@ -176,43 +176,57 @@ namespace test { .completePort() .build()}; - ///////////////////////////////////////////////////////TODO WIP -SHOW_EXPR(watch(nA).getNodeName()) -SHOW_EXPR(watch(nA).getNodeSpec()) -SHOW_EXPR(watch(nA).isSrc()) -SHOW_EXPR(watch(nA).ports().size()) -SHOW_EXPR(watch(nA).watchPort(0).getProcName()) -SHOW_EXPR(watch(nA).watchPort(0).getProcSpec()) -SHOW_EXPR(watch(nA).watchPort(1).getProcSpec()) + // Drill down into each node... + // investigate spec and precursor connectivity + CHECK (watch(nA).getNodeName() == "srcA"_expect ); + CHECK (watch(nA).getNodeSpec() == "srcA-β—Ž"_expect ); // includes shortened rendering of lead nodes + CHECK (watch(nA).isSrc() == true ); // ...but this one has no leads ==> it is a source + CHECK (watch(nA).ports().size() == 2 ); + CHECK (watch(nA).watchPort(0).getProcName() == "srcA.a"_expect ); + CHECK (watch(nA).watchPort(0).getProcSpec() == "srcA.a(int)"_expect ); + CHECK (watch(nA).watchPort(1).getProcSpec() == "srcA.b(int)"_expect ); + VERIFY_FAIL ("Port-idx 2 >= 2 (available Ports)" - ,watch(nA).watchPort(2)); - -SHOW_EXPR(watch(nB).getNodeSpec()) -SHOW_EXPR(watch(nB).isSrc()) -SHOW_EXPR(watch(nB).ports().size()) -SHOW_EXPR(watch(nB).watchPort(0).getProcSpec()) -SHOW_EXPR(watch(nB).watchPort(1).getProcSpec()) -SHOW_EXPR(watch(nB).watchPort(2).getProcSpec()) - -SHOW_EXPR(watch(nM).getNodeName()) -SHOW_EXPR(watch(nM).getNodeSpec()) -SHOW_EXPR(watch(nM).ports().size()) -SHOW_EXPR(watch(nM).watchPort(0).getProcName()) -SHOW_EXPR(watch(nM).watchPort(1).getProcName()) -SHOW_EXPR(watch(nM).watchPort(2).getProcName()) -SHOW_EXPR(watch(nM).watchPort(2).getProcSpec()) -SHOW_EXPR(watch(nM).watchPort(0).srcPorts().size()) -SHOW_EXPR(watch(nM).watchPort(0).watchLead(0).getProcName()) -SHOW_EXPR(watch(nM).watchPort(0).watchLead(1).getProcName()) -SHOW_EXPR(watch(nM).watchPort(1).srcPorts().size()) -SHOW_EXPR(watch(nM).watchPort(1).watchLead(0).getProcName()) -SHOW_EXPR(watch(nM).watchPort(1).watchLead(1).getProcName()) -SHOW_EXPR(watch(nM).watchPort(2).srcPorts().size()) -SHOW_EXPR(watch(nM).watchPort(2).watchLead(0).getProcName()) -SHOW_EXPR(watch(nM).watchPort(2).watchLead(1).getProcName()) -SHOW_EXPR(watch(nM).watchPort(2).watchLead(1).getProcSpec()) -SHOW_EXPR(watch(nM).watchPort(2).watchLead(1).isSrc()) -SHOW_EXPR(watch(nM).watchPort(2).watchLead(1).srcPorts().size()) + , watch(nA).watchPort(2) ); + + CHECK (watch(nB).getNodeSpec() == "srcB-β—Ž"_expect ); + CHECK (watch(nB).isSrc() == true ); + CHECK (watch(nB).ports().size() == 3 ); + CHECK (watch(nB).watchPort(0).getProcSpec() == "srcB.a(ulong)"_expect); + CHECK (watch(nB).watchPort(1).getProcSpec() == "srcB.b(ulong)"_expect); + CHECK (watch(nB).watchPort(2).getProcSpec() == "srcB.c(ulong)"_expect); + + CHECK (watch(nM).getNodeName() == "fade"_expect ); + CHECK (watch(nM).getNodeSpec() == "fade┉┉{srcA, srcB}"_expect ); // the spec shows the set of source nodes + CHECK (watch(nM).ports().size() == 3 ); + CHECK (watch(nM).watchPort(0).getProcName() == "fade.A_mix"_expect ); + CHECK (watch(nM).watchPort(1).getProcName() == "fade.B_mix"_expect ); + CHECK (watch(nM).watchPort(2).getProcName() == "fade.C_mix"_expect ); + CHECK (watch(nM).watchPort(2).getProcSpec() == "fade.C_mix(int,ulong)(uint64_t)"_expect ); + CHECK (watch(nM).watchPort(0).srcPorts().size() == 2 ); + CHECK (watch(nM).watchPort(0).watchLead(0).getProcName() == "srcA.a"_expect ); // watchLead(#) navigates to source port + CHECK (watch(nM).watchPort(0).watchLead(1).getProcName() == "srcB.a"_expect ); + CHECK (watch(nM).watchPort(1).srcPorts().size() == 2 ); + CHECK (watch(nM).watchPort(1).watchLead(0).getProcName() == "srcA.b"_expect ); + CHECK (watch(nM).watchPort(1).watchLead(1).getProcName() == "srcB.b"_expect ); + CHECK (watch(nM).watchPort(2).srcPorts().size() == 2 ); + CHECK (watch(nM).watchPort(2).watchLead(0).getProcName() == "srcA.b"_expect ); + CHECK (watch(nM).watchPort(2).watchLead(1).getProcName() == "srcB.c"_expect ); + CHECK (watch(nM).watchPort(2).watchLead(1).getProcSpec() == "srcB.c(ulong)"_expect); + CHECK (watch(nM).watchPort(2).watchLead(1).isSrc() == true ); // the lead port itself is a source + CHECK (watch(nM).watchPort(2).watchLead(1).srcPorts().size() == 0 ); + + // Helper predicate to verify connectedness to a specific Port given by reference + CHECK (watch(nM).watchPort(2).verify_connected( watch(nA).ports()[0]) == false ); + CHECK (watch(nM).watchPort(2).verify_connected( watch(nA).ports()[1]) == true ); // Node-nM.port#2 is somehow connected to Node-nA.port#1 + CHECK (watch(nM).watchPort(2).verify_connected( watch(nB).ports()[0]) == false ); + CHECK (watch(nM).watchPort(2).verify_connected( watch(nB).ports()[1]) == false ); + CHECK (watch(nM).watchPort(2).verify_connected( watch(nB).ports()[2]) == true ); + CHECK (watch(nM).watchPort(2).verify_connected(0, watch(nA).ports()[1]) == true ); // Node-nM.port#2 connects via source#0 to Node-nA.port#1 + CHECK (watch(nM).watchPort(2).verify_connected(1, watch(nB).ports()[2]) == true ); + CHECK (watch(nM).watchPort(2).verify_connected(0, watch(nB).ports()[2]) == false ); + CHECK (watch(nM).watchPort(2).verify_connected(1, watch(nA).ports()[1]) == false ); // Node-nM.port#2 doesn't connect via source#1 to Node-nA.port#1 + ///////////////////////////////////////////////////////TODO WIP UNIMPLEMENTED ("verify connectivity"); } diff --git a/wiki/thinkPad.ichthyo.mm b/wiki/thinkPad.ichthyo.mm index c13f6e7f9..145cbcbba 100644 --- a/wiki/thinkPad.ichthyo.mm +++ b/wiki/thinkPad.ichthyo.mm @@ -101858,7 +101858,7 @@ StM_bind(Builder<R1> b1, Extension<R1,R2> extension) - + @@ -101939,19 +101939,30 @@ StM_bind(Builder<R1> b1, Extension<R1,R2> extension) - - - - + + + + + + + + + + + + + + + - + @@ -101966,10 +101977,10 @@ StM_bind(Builder<R1> b1, Extension<R1,R2> extension) - + - + @@ -102715,7 +102726,7 @@ StM_bind(Builder<R1> b1, Extension<R1,R2> extension) - + @@ -105236,8 +105247,9 @@ StM_bind(Builder<R1> b1, Extension<R1,R2> extension) - + + @@ -105384,8 +105396,10 @@ StM_bind(Builder<R1> b1, Extension<R1,R2> extension) - - + + + + @@ -106042,7 +106056,7 @@ StM_bind(Builder<R1> b1, Extension<R1,R2> extension) - + @@ -106503,18 +106517,39 @@ StM_bind(Builder<R1> b1, Extension<R1,R2> extension) - - + + + + + + + + +

+ ...wird eigentlich erst für die Hash / Cache-Key-Berechnung relevant; dann aber wären erst einige kniffelige technische Probleme zu lösen, die ich im Moment nicht recht bestimmen kann... +

+ +
+ +
+ + + - - + + + + + + + @@ -107235,8 +107270,8 @@ StM_bind(Builder<R1> b1, Extension<R1,R2> extension) - - + +